操作系统测试代写 | operating system quiz

本次美国代写主要为操作系统测试

Section A (32 marks)
Attempt ALL questions from this Section. In case of the fill-in-the-blank questions,
abbreviation or short form will NOT be accepted.

1. [2 marks]
At the beginning of each instruction cycle, the processor fetches the instruction whose
address is stored in (i) and the fetched instruction is loaded into (ii) .
a) accumulator
b) arithmetic and logic unit
c) instruction register
d) program counter

2. [1 mark]
In , a process has to busy wait for the I/O operation to be completed before
proceeding.
a) Programmed I/O
b) Direct memory access (DMA)
c) Interrupt-driven I/O
d) None of the above

3. [3 marks]
Complete the following table by inserting “high”, “middle” or “low”.
Type of memory Capacity Access frequency
by processor
Disk (i) (iv)
Main memory (ii) (v)
Registers (iii) (vi)
4. [2 marks]
After the I/O device issues an interrupt signal to the processor, the following events will
happen. Write down the correct sequence of those events.
(i) Processor loads new PC value based on interrupt
(ii) Processor restores PSW and PC from control stack
(iii) Processor pushes PSW and PC onto the control stack
(iv) Process the interrupt

(v) Processor finishes execution of current instruction

5. [1 mark]
Comparing with uniprogramming, multiprogramming generally achieves mean
response time and
a) higher, higher
b) higher, lower
c) lower, higher
d) lower, lower
throughput.