程序代写|COMP2017 COMP9017 Assignment 2

这是一篇来自澳洲的关于实现一个简单虚拟机的程序代写。具体需要您的程序将使用一个命令行参数作为包含RISK-XVII汇编代码的文件的路径。

 

Task Description

Ah, yes, because what the world really needs right now is yet another virtual machine. But not just any virtual machine, no! We need one with the highly coveted and incredibly useful feature of heap banks. Because who needs to worry about memory allocation when you can just throw it in a heap, am I right? So gather ’round, folks, and get ready to develop the vm_RISKXVII, because nothing says “cutting edge” like a virtual machine named after a board game that this assignment has absolutely nothing to do with. Now, let’s dive into the specs and get this party started!

In this assignment you will be implementing a simple virtual machine. Your program will take a single command line argument being the path to the file containing your RISK-XVII assembly code.

Before attempting this assignment it would be a good idea to familiarise yourself with registers,memory space, program counters, assembly and machine code. A strong understanding of these concepts is essential to completing this assignment. Section 3.6 and 3.7 of the course textbook provide specific detail to x86_64 architecture, however you can review these as a reference.

In order to complete this assignment at a technical level you should revise your understanding of bitwise operations, file IO, pointers and arrays.

Some implementation details are purposefully left ambiguous; you have the freedom to decide on the specifics yourself. Additionally this description does not define all possible behaviour that can be exhibited by the system; some error cases are not documented. You are expected to gracefully report and handle these errors yourself.

You are encouraged to ask questions on Ed1 . Make sure your question post is of “Question” post type and is under “Assignment” category A2” subcategory. As with any assignment, make sure that your work is your own2 , and that you do not share your code or solutions with other students.

The Architecture

In this assignment you will implement a virtual machine for an 32-bit instruction-set. The memory mapped virtual components of your machine are outlined below:

1https://edstem.org/au/courses/10466/discussion/

2Not GPT-3/4’s, ChatGPT’s or copilot’s, etc.

  • 0x0000 – 0x3ff: Instruction Memory – Contains 2 10 of bytes for text segment.
  • 0x0400 – 0x7ff: Data Memory – Contains 2 10 of bytes for global variables, and function stack.
  • 0x0800 – 0x8ff: Virtual Routines – Accesses to these address will cause special operations to be called.
  • 0xb700 +: Heap Banks – Hardware managed 128 x 64 bytes banks of dynamically allocate-able memory.

Your machine also has a total of 32 registers, as well as a PC (program counter) that points to the address of the current instruction in memory. Each of the general-purpose registers can store 4 bytes (32 bits) of data that can be used directly as operands for instructions. All registers are general-purpose except for the first one, which has an address of 0. This register is called the zero register,as any read from it will return a value of 0. Writes to the zero register are ignored.

During execution you should not store any information about the state of the machine outside of the virtual memory devices and the register bank.

Note: A register stores a single value using a fixed bit width. The size of a register corresponding to the processor’s word size, in this case 32 bits. Think of them as a primitive variable. Physical processor hardware is constrained, and the number of registers is always fixed. There are registers which serve specific purposes, and those which are general. Please identify these in the description and consider them for your solution. You need not consider special purpose registers, such as floating point, in this assignment.

RISK-XVII Instruction-Set Architecture

An Instructions-Set Architecture(ISA) specifies a set of instructions that can be accepted and executed by the target machine. A program for the target machine is an ordered sequence of instructions.

Our virtual machine will operate on a home-brewed ‘RISK-XVII’ instruction set architecture. During marking, you will be provided with binaries in this ISA to run on your virtual machine. RISK-XVII is a reduced version of the well-known RV32I instruction set architecture, and your virtual machine should be able to execute binary programs compiled for RV32I, as long as they do not include instructions that were not specified by ‘RISK-XVII’.

There are in total 33 instructions defined in RISK-XVII, they can be classified into three groups by their functionality:

  1. Arithmetic and Logic Operations – e.g. add, sub, and, or, slt, sll
  2. Memory Access Operations – e.g. sw, lw, lui
  3. Program Flow Operations – e.g. jal, beq, blt

These instructions provide access to memory and perform operations on data stored in registers, as well as branching to different locations within the program to support conditional execution. Some instructions also contain data, i.e., an immediate number, within their encoding. This type of instruction is typically used to introduce hard-coded values such as constants or memory address offsets.

The RISK-XVII instruction set is Turing complete and, therefore, can run any arbitrary program, just like your PC!

Instructions in the RISK-XVII instruction set architecture are encoded into 4 bytes of data. Since each instruction can access different parts of the system, six types of encoding formats were designed to best utilize the 32 bits of data to represent the operations specified by each instruction: R, I, S, SB,U, UJ. The exact binary format of each encoding type can be found in the table below.:

Let’s take a look at some common fields in all types of encoding:

  • opcode – used in all encoding to differentiate the operation, and even the encoding type itself.
  • rd, rs1, rs2 – register specifiers. rs1 and rs2 specify registers to be used as the source operand, while rd specifies the target register. Note that since there are 32 registers in total, all register specifiers are 5 bits in length.
  • func3, func7 – these are additional opcodes that specify the operation in more detail. For example, all arithmetic instructions may use the same opcode, but the actual operation, e.g.add, logic shift, are defined by the value of func3.
  • imm – immediate numbers. These value can be scrambled within the instruction encoding. For example, in SB, the 11st bit of the actual value was encoded at the 7th bit of the instruction,while the 12rd bit was encoded at the 31th bit.

An RISK-XVII program can be illustrated as below:

[Instruction 1 (32 bits)]

[Instruction 2 (32 bits)]

[Instruction 3 (32 bits)]

[…]

[Instruction n

(32 bits)]

RISK-XVII Instructions

We will now cover in detail all instructions defined in RISK-XVII. Pay close attention as your virtual machine need to be able to decode and execute all of these to be eligible for a full mark! You are encouraged to summarise them into a reference table before implementing your code.